As part of AMD's Q1'2024 earnings announcement this week, the company is offering a brief status update on some of their future products set to launch later this year. Most important among these is an update on their Zen 5 CPU architecture, which is expected to launch for both client and server products later this year.

Highlighting their progress so far, AMD is confirming that EPYC "Turin" processors have begun sampling, and that these early runs of AMD's next-gen datacenter chips are meeting the company's expectations.

"Looking ahead, we are very excited about our next-gen Turin family of EPYC processors featuring our Zen 5 core," said Lisa Su, chief executive officer of AMD, at the conference call with analysts and investors (via SeekingAlpha). "We are widely sampling Turin, and the silicon is looking great. In the cloud, the significant performance and efficiency increases of Turin position us well to capture an even larger share of both first and third-party workloads."

Overall, it looks like AMD is on-track to solidify its position, and perhaps even increase its datacenter market share with its EPYC Turin processors. According to AMD, the company's server partners are developing a 30% larger number of designs for Turin than they did Genoa. This underscores how AMD's partners are preparing for even more market share growth on the back of AMD's ongoing success, not to mention the improved performance and power efficiency that the Zen 5 architecture should offer.

"In addition, there are 30% more Turin platforms in development from our server partners, compared to 4th Generation EPYC platforms, increasing our enterprise and with new solutions optimized for additional workloads," Su said. "Turin remains on track to launch later this year."

AMD's EPYC 'Turin' processors will be drop-in compatible with existing SP5 platforms (i.e., will come in an LGA 6096 package), which will facilitate its faster ramp and adoption of the platform both by cloud giants and server makers. In addition, AMD's next-generation EPYC CPUs are expected to feature more than 96 cores and a more versatile memory subsystem.

Source: AMD Q1'24 Earnings Call (via SeekingAlpha)



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  • nandnandnand - Friday, May 3, 2024 - link

    "C" cores use some silicon tricks and lower clock speeds to keep their efficiency up. At least, the current dense "C" cores for servers do, there's talk of new dense-but-fast-at-any-cost cores possibly coming to client but that's a story for another day.

    You get the stated power reduction at the same performance (clocks), not both at once. Which is fine. And of course the analysis can get more complicated than that because there is an entire power curve and other factors.

    AMD is already doing 128 Zen 4c cores (Bergamo) at a 360W TDP. Just plugging in the numbers like you did: (360 * 1.5 * (0.7|0.75)) = 380-405 W for 192 cores on N3. That would be a more reasonable 6-13% increase, and not far off from what is already being done on the SP5 socket (9684X is 400W).

    Epyc is not for me. I'd like to see AMD make AM6 physically larger and support quad-channel memory, for higher core counts, bigger APUs, more heat dissipation, etc. Basically delete Threadripper and split the difference by offering more prosumer capabilities and flexibility on the consumer platform, and pushing others to use Epyc. Just the move to quad-channel memory would be great for APU-only systems.

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